NOTICE: This Document was reapproved with minor editorial
changes.
Processing systems now employed in advanced device
manufacturing use aligning mechanisms to position the wafer rotationally and in
x-y prior to processing. Many of these scan the wafer periphery and determine
the geometric center of the wafer surface. This is most often seen on stepping
aligners, to minimize the effects of wafer-to-wafer diameter variation in mixed
aligner type fabs. Similar center-referencing subsystems are found on many
characterization systems. The wafer coordinate system provides a method for
referencing any other coordinate system, such as a site, pattern, or mapping
array, to the physical geometry of the wafer surface.
If the points of the array lie on the front surface of the
wafer, only the x and y (or r and θ) coordinates are relevant. It has become
increasingly important in semiconductor material and device manufacturing to
describe, in unambiguous terms, the position of a point on a wafer that
automatic processing, test, or characterization equipment can recognize and
locate. For example, characterization equipment needs to report the precise
locations of defects and anomalies discovered in wafers before or after
processing in order to relate the presence or absence of such defects and
anomalies to device yield variations. The wafer coordinate system can be used
to establish the coordinates of each point of interest, and, through
transformation to the yield analysis coordinate system, relate them to the die
yield map.
In response to these needs, this Practice defines a wafer
coordinate system to facilitate the precise locating and reporting of points on
the wafer surface. If the point or points lie above or below the surface, the
z-coordinate must also be used. Because the zero point on the z-axis is
application specific, this Practice treats the x-y-z (or r-q-z) system separately from the
surface coordinate system.
This Practice covers procedures for defining a wafer
coordinate system for locating uniquely any point on a wafer surface using the
wafer center as the origin and either Cartesian (x-y) or polar (r-θ)
coordinates.
For unpatterned wafers, this wafer coordinate system can be
used directly or in conjunction with a rectangular or polar overlay array.
This wafer coordinate system can also be used to locate the
origins or other reference points of other coordinate systems used to define or
report position data of site, die, or map arrays on the front or back surface
of a patterned or unpatterned wafer. In this way, the array coordinate system
may be referenced to the physical geometry of the wafer. Selected modes of
application of the wafer coordinate system are given for information only in
Related Information 1.
This Practice also covers procedures for defining a
three-dimensional x-y-z (or r-q-z)
coordinate system for the wafer.
Referenced SEMI Standards (purchase separately)
SEMI E5 — Specification for SEMI Equipment Communications
Standard 2 Message Content (SECS-II)
SEMI M1 — Specification for Polished Single Crystal Silicon
Wafers
SEMI M12 — Specification for Serial Alphanumeric Marking of
the Front Surface of Wafers
SEMI M13 — Specification for Alphanumeric Marking of
Silicon Wafers
SEMI M17 — Guide for a Universal Wafer Grid
SEMI M59 — Terminology for Silicon Technology
Revision History
SEMI M20-0215 (Reapproved 0421)
SEMI M20-0215 (technical revision)
SEMI M20-1110 (technical revision)
SEMI M20-1104 (technical revision)
SEMI M20-0704 (technical revision)
SEMI M20-0998 (technical revision)
SEMI M20-92 (technical revision)
SEMI M20-91 (first published)