M06100 - SEMI M61 - Specification for Silicon Epitaxial Wafers with Buried Layers

M06100 - SEMI M61 - Specification for Silicon Epitaxial Wafers with Buried Layers

Price: $0.19 0

Revision:
SEMI M61-0612 (Reapproved 1023) - CurrentSEMI M61-0612 (Reapproved 0319) - SupersededSEMI M61-0612 - SupersededSEMI M61-0307 - SupersededSEMI M61-0705 - Superseded

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Description

 

This Specification defines the properties of silicon epitaxial wafers with buried layers that relate to the characteristics of photolithography, buried layer, and buried layer pattern after the deposition of the epitaxial layer.
 

This Specification is intended to be used with the polished wafer specification (SEMI M1) and the epitaxial wafer specification (SEMI M2), which define the properties of the substrate and the epitaxial layer, respectively.

 

Referenced SEMI Standards (purchase separately)
SEMI M1 — Specification for Polished Single Crystal Silicon Wafers
SEMI M2 — Specification for Silicon Epitaxial Wafers for Discrete Device Applications
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI M59 — Terminology for Silicon Technology
SEMI MF26 — Test Method for Determining the Orientation of a Semiconductive Single Crystal

 

Revision History
SEMI M61-0612 (Reapproved 1023)
SEMI M61-0612 (Reapproved 0319)
SEMI M61-0612 (technical revision)
SEMI M61-0307 (technical revision)
SEMI M61-0705 (first published)



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